Verification of I2C DUT Using Systemverilog

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Provided by: Technicaljournalsonline
Topic: Hardware
Format: PDF
Verification is the process used to demonstrate the functional correctness of a design prior to its fabrication. The lack of flexible verification environments that allow verification components reuse across ASIC design projects keep the verification cost very high. Design engineers have made design reuse central in bringing the design effort's complexity back to a manageable size and to reduce development time and effort. Considering the fact that verification consumes more resources than design does in a typical design project, it would be of great value to build verification components that are modular and reusable.
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