Institute of Electrical & Electronic Engineers
Resistive memory, also known as memristor, is recently emerging as a potential successor to traditional charge-based memories. However, the nanoscale features of these devices introduce challenges in modeling and simulation. In this paper, the authors propose a novel Verilog-A based complementary resistive switch memory model for effective simulation and analysis. Their proposed model captures desired non-linear characteristics using voltage based state control as opposed to recently proposed current based state control. They demonstrate that such state control has advantages for their proposed CRS model based crossbar arrays in terms of symmetric on/off voltages and significantly reduced sneak path currents with high noise margin compared to traditional memristor based architectures.