Verilog Implementation of High Performance RC6 Algorithm Using Ancient Indian Vedic Mathematics

RC6, a cryptographic algorithm, is specified as RC6-w/r/b, where w is word size, r is the number of rounds and b is the length of encryption key in bytes. RC6 is the successor to RC5. It is one of the most promising algorithms that are both fast and secure. It uses four bit registers, integer multiplication, quadratic equation and fixed bit shifting. This paper examines how the Vedic algorithm of Urdhva Tiryagbhyam speeds up the computation of this algorithm when compared with conventional algorithms in existence.

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