Very Wide Register: An Asymmetric Register File Organization for Low Power Embedded Processors

Provided by: edaa
Topic: Hardware
Format: PDF
In current embedded systems processors, multi-ported register files are one of the most power hungry parts of the processor, even when they are clustered. This paper presents a novel register file architecture, which has single ported cells and asymmetric interfaces to the memory and to the data path. Several realistic kernels from the TI DSP benchmark and from Software Defined Radio (SDR) are mapped on the architecture. A complete physical design of the architecture is done in TSMC 90nm technology.

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