NORTH ATLANTIC UNIVERSITY UNION
Field Programmable Gate Arrays (FPGAs) are usually programmed using languages and methods inherited from the domain of VLSI (Very Large Scale Integration) synthesis. These methods, however, have not always been adapted to the new possibilities opened by FPGA, nor to the new constraints do they impose on a design. For FPGA circuit, the authors can use the VHDL language as hardware description (acronym for very high speed integrated circuits hardware description language). The key of the art design is focused around high level synthesis which is a top down design methodology that transforms an abstract level using VHDL description.