Virtual Platform Generation Using TECS Software Component and SCE

In this paper, the authors present a system-level design framework integrating TECS, which is one of the software component technologies for embedded systems, and SCE, which is a System-on-Chip (SoC) environment based on SpecC language, for realizing a higher abstraction level design than prior work. Since TECS implementation is based on conventional C language, such as function calls, it is suitable for embedded software developers. Then, their framework supports the transformation from component descriptions and component sources to SpecC specification for using SCE advantages, such as design space exploration and efficient MPSoC implementation.

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University of California, Davis