VISION: A Framework for Voltage Island Aware Synthesis of Interconnection Networks-on-Chip

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Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
High power dissipation has today become one of the major challenges in Chip Multi-Processor (CMP) design. Designers in recent years have proposed several techniques to alleviate the power challenge, one of which is the use of Voltage Islands (VIs) that can help reduce both switching and standby components of power. The use of VIs allows groups of cores to be powered by the same supply source and permits operating different portions of the chip at different voltage levels in order to optimize the overall chip power consumption.
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