VLIW-SCORE: Beyond C for Sequential Control of SPICE FPGA Acceleration

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Many stand-alone, FPGA-based accelerators separate the implementation of a computation into two components - a large parallel component that is realized as hardware on spatial FPGA fabric and a small control and co-ordination component that is realized as software on embedded soft-core processors like an off-the-shelf Xilinx Microblaze (or host off-chip CPU). While this hardware-software partitioning methodology allows the designer to lower design effort when composing the accelerator system, it introduces unnecessary Amdahl's Law bottlenecks and limits scalability.
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