VLSI Implementation of 2048 Point FFT/IFFT for Mobile Wi-MAX

Provided by: International Journal of Computer Applications
Topic: Networking
Format: PDF
This paper represents 2048 point Fast Fourier Transform and its inverse (FFT/IFFT) for Mobile Wi-MAX. Modified architecture also provides concept of local ROM module and variable length support from 128-2048 point for FFT/IFFT. UMC 0.18?m is used to design the same. FFT/IFFT chip consumes 266.81mW at 40MHz, 130.74mW at 20MHz and 65mW at 10 MHz for length of 2048 point. Its core size is 2.6mm x 2.6mm. Its latency is 2050 clock cycle with maximum clock frequency 40MHz. Start up time for the chip is N/2 clock cycle where N is the length of FFT/IFFT. 16 bit word length with fixed point precision is used for entire implementation. As Wi-MAX is used for Metropolitan Area Network, it uses Orthogonal Frequency Division Multiple Access scheme.

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