International Journal of Emerging Science and Engineering (IJESE)
In this paper, the authors present FPGA (Field Programmable Gate Array) implementation of the DES (Data Encryption Standard) and triple-DES with improved security against power analysis attacks. This is programmed in Verilog. DES & TDES is basically used in various cryptographic applications and wireless protocol security layers. The proposed designs use Boolean masking, a previously introduced technique to protect smart card implementations from these attacks. Triple DES was the answer to many of the shortcomings of DES. Since it is based on the DES algorithm, it is very easy to modify existing software to use triple DES.