WCRT Algebra and Interfaces for Esterel-Style Synchronous Processing

Provided by: edaa
Topic: Hardware
Format: PDF
Reconciling performance and predictability in embedded systems is a challenge that spans all layers of hard- and software development. The synchronous model of computation together with a suitable execution platform facilitates system-level timing predictability. This paper introduces an algebraic framework for precisely capturing Worst Case Reaction Time (WCRT) characteristics for Esterel-style reactive processors with hardware-supported multithreading. This framework provides a formal grounding for the WCRT problem, and allows improving upon earlier heuristics by accurately and modularly characterizing timing interfaces.

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