Institute of Electrical & Electronic Engineers
WIreless Networks-on-Chips (WINoCs) hold substantial promise for enhancing multicore integrated circuit performance, by augmenting conventional wired interconnects. As the number of cores per IC grows, intercore communication requirements will also grow, and WINoCs can be used to both save power and reduce latency. In this paper, the authors briefly describe some of the key challenges with WINoC implementation, and also describe their example design, iWISE, which is a scalable wireless interconnect design. They show that the integration of wireless interconnects with wired interconnects in NoCs can reduce overall network power by 34 percent while achieving a speedup of 2.54 on real applications.