Worst-Case Design and Margin for Embedded SRAM

Provided by: edaa
Topic: Storage
Format: PDF
Device variability is becoming important in embedded memory design, and a fundamental question is how much margin is enough to ensure high quality and robust operation without over-constraining performance. An important aspect of design for yield for embedded SRAM is identifying the expected worst case behavior in order to guarantee that sufficient design margin is present. Previously, this has involved multiple simulation corners and extreme test conditions. It is shown that statistical concerns and device variability now require a different approach, based on work in extreme value theory. This method is used to develop a lower-bound for variability-related yield in memories.

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