L-2 cache

from www.whatis.com (layer 2 cache -- L2 cache) is described in paragraph #2 below :

cache memory

Cache memory is random access memory (RAM) that a computer microprocessor can access more quickly than it can access regular RAM. As the microprocessor processes data, it looks first in the cache memory and if it finds the data there (from a previous reading of data), it does not have to do the more time-consuming reading of data from larger memory.

Cache memory is sometimes described in levels of closeness and accessability to the microprocessor. An L1 cache is on the same chip as the microprocessor. (For example, the PowerPC 601 processor has a 32 kilobyte level-1 cache built into its chip.) L2 is usually a separate static RAM (SRAM) chip. The main RAM is usually a dynamic RAM (DRAM) chip.

In addition to cache memory, one can think of RAM itself as a cache of memory for hard disk storage since all of RAM's contents come from the hard disk initially when you turn your computer on and load the operating system (you are loading it into RAM) and later as you start new applications and access new data. RAM can also contain a special area called a disk cache that contains the data most recently read in from the hard disk.

Level 2 Cache is very fast memory that is usually included with the CPU. Occasionally it is included "on the chip" (eg Celeron's used to have on-chip L2 cache) and so its performance rivals L1 cache but more often it is off-chip and has a slight latency when being accessed.

L2 Cache is often on the same daughterboard that the CPU is on and uses a special very fast bus to be accessed - rather than the "normal" slower bus that is used for main memory (amongst other things).

To put this into context, though, cache (both L1 & L2) is the memory that the CPU specifically manages and contains the most recently used, hopefully to be used again, data and instructions so they may be very quickly accessed without having to go back to main memory which is a relatively slow process.

Hope this helps.
Cheers,
Tim.

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