An Efficient Two's Complement Multiplier with FPGA Implementation

Download Now
Provided by: Iosrjournals
Topic: Hardware
Format: PDF
The performance of multiplication is crucial for multimedia applications such as 3D graphics and signal processing systems which depend on extensive numbers of multiplications. Previously reported multiplication algorithms mainly focus on rapidly reducing the partial products rows down to final sums and carries used for the final accumulation. These techniques mostly rely on circuit optimization and minimization of the critical paths. In this paper, an algorithm to achieve fast multiplication in two's complement representation is presented.
Download Now

Find By Topic