Delay Time Analysis of Combined CMOS Ring Oscillator
CMOS ring voltage controlled oscillator with combined delay stages is presented. Initially, the general condition of oscillators is discussed then two common inverters are introduced and their delay times are calculated parametrically. The authors’ analysis and parametrically calculations states that delay time of basic type inverter changes in opposite direction compared with current starved inverter versus supply voltage changing, so a combined schematic can be used to obtain better frequency stability. The simulated proposed CMOS VCO reduced the oscillation frequency dependence to supply voltage considerably and is appropriate for on-chip applications since no passive element is used.
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