Design and Development of Verification Environment to Verify GPIO Core using UVM

The GPIO (General Purpose Input/Output) core design provides a general purpose input/output interface to a 32-bit On-chip Peripheral Bus (OPB). This GPIO core requires simple output and/or input software controlled signals and implements the functions that are not implemented using dedicated controllers in the system. Almost all FPGA (Field Programmable Gate Array) boards contain GPIO peripheral. In this paper, the authors are atomizing the functions of the GPIO core by writing the code in VERILOG and simulating it in QUESTASIM. In this paper, they verify the all functions of GPIO core by writing verification code in UVM (Universal Verification Methodology) with different test cases.

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International Journal of Scientific and Research Publication (IJSRP)