Design and Implementation of FPGA based Barrel shifter - TechRepublic

Design and Implementation of FPGA based Barrel shifter

Last Updated: February 12, 2022 Format: PDF

A barrel shifter is a digital circuit that can shift a data word by a specified number of bits in one clock cycle. It can be implemented as a sequence of multipliers (mux), and in such an implementation the output of one mux is connected to the input of the next mux in a way that depends on the shift distance. In arithmetic and logic operations barrel shifters is used to shift a desired number of bits in a desired direction. In this paper, 8-bit & 16-bit barrel shifter architecture is proposed and implemented using Verilog code.

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