Design and Implementation of Full Subtractor using CMOS 180nm Technology

Arithmetic circuits are important part of digital circuits. In the digital circuits, subtractor is one of the most critical components used in the processor of portable devices full subtractor is a combinational digital circuit that performs 1 bit subtraction with borrow-in. This paper is to design 1-bit full subtractor by using CMOS180nm technology with reduced number of transistors and hence it is efficient in area, speed and power consumption. Two types of simulation or test bench will be performed in order to ensure that the implementation is fully functional.

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