Design and simulation of 16 Bit UART Serial Communication Module Based on VHDL - TechRepublic

Design and simulation of 16 Bit UART Serial Communication Module Based on VHDL

Last Updated: February 12, 2022 Format: PDF

In this paper the authors describe the design of UART (Universal Asynchronous Receiver Transmitter) based on VHDL. As UART is consider as a low speed, low cost data exchange between computer and peripherals. To overcome the problem of low speed data transmission, a 16 bit UART is proposed in this paper. It works on 9600bps baud rate. This will result in increased the speed of UART. Whole design is simulated with Xilinx ISE8.2i software and results are completely consistent with UART protocol.

Explore More Resources

Search Resources

Search to explore resources