In this paper, a Fast Fourier Transform (FFT) or inverse FFT processor for Fifth-Generation (5G) Multiple-Input Multiple-Output (MIMO) Orthogonal Frequency Division Multiplexing (OFDM) system’s baseband processor is implemented. The proposed 128-point FFT/IFFT processor employs mixed-radix (radix-2 and radix-23)algorithm to reduce the number of complex multiplications. The pipelined FFT architecture with Multipath Delay Feedback (MDF) is chosen for FFT/IFFT processor implementation to have very high throughput rate and minimum power consumption. The resulting Mixed-Radix MDF (MRMDF) architecture provides a very high throughput rates for 1-8 simultaneous data sequences to meet new emerging standards of the MIMO-OFDM based systems.