FPGA Implementation of LTE Downlink Transceiver with Synchronization and Equalization

Long Term Evolution (LTE) is an advanced standard of the mobile communication systems. LTE has been developed by the 3rd Generation Partnership Project (3GPP). The new features exhibited by LTE is a direct impact of applying new modulation and coding techniques such as the Orthogonal Frequency Division Multiplexing (OFDM) for the downlink and the Single Carrier Frequency Division Multiple Access (SC-FDMA) for the Uplink as well as turbo coding. This paper presents a Field Programmable Gate Array (FPGA) design and implementation of the LTE downlink transmitter and receiver according to releases 8 and 9 on Virtex 6 XC6VLX240T FPGA kit using Xilinx ISE design suite version 12.1.