Low Power Optimization of Full Adder, 4-Bit Adder and 4-Bit BCD Adder

Micro-electronic devices are playing a very prominent role in electronic equipment’s which are used in daily life. For electronic equipment battery life is important. So, in order to reduce the power consumption the authors implement a sleepy technique to the electronic circuits. Sleepy technique is also called as power gating technique. In the power gating structure, a circuit operates in two different modes. In the sleep mode, the sleep transistors are turned OFF to reduce the leakage power.