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Front end BUS and Back end BUS

By harvardd ·
Regarding level 2 cache, what is meant by back end bus or front end bus?

Is the cache data accessed differently with the newer Pentium processors?

Thanks for your help.


Tony

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Front end BUS and Back end BUS

by jwpluto In reply to Front end BUS and Back en ...

As CPU's and memory got faster, it became advantageous to divide the CPU from the RAM, which was directly connected in many older systems. The frontside bus connects the system memory, via the memory controller, to the CPU, and the other buses to the CPU and system memory. The backside bus really only has one purpose: that's to provide a direct, fast channel between the CPU and the L2 cache. This architecture optimizes the effectiveness of the L2 cache over previous cache types. Much faster andless work for the CPU.

Hope that helps!

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Front end BUS and Back end BUS

by harvardd In reply to Front end BUS and Back en ...

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Front end BUS and Back end BUS

by harvardd In reply to Front end BUS and Back en ...

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