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GNU make problem with foreach construct

By godhner ·
I've been having difficulties using the "foreach" construct in GNU
make, and I'm hoping someone has some insight to help me
understand why I can't get consistently productive behavior from
it. In the Make manual section 8.8 it says the "eval" function
may be used to create new rules, among other things. It also
gives an example of the combined use of "foreach", "eval", and
"call" to create a template for a command which is used in the
example to apply in rules for a list of programs. In my makefiles
I have tried with mixed success to use this same template
system to create rules for lists of specific targets. If my
template specifies that a depends on a.o and a.o depends on
a.c, then the rules remain unseen consistently. But if I create a
rule for a depending on a.c directly, then in some cases I find
that the template-created rule works, and in other cases I find it
doesn't. I can't find the difference, and of course the
documentation goes no further to clarify the requirements (so
far as I can find). Is there perchance anyone reading this who
knows the special incantations which will sort the working
templates from the non-working templates? Does anyone have
the ear of the elusive make-genie and will ask it a favor on my

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by Jaqui In reply to GNU make problem with for ...

it sounds like your system isn't wiping old builds. clean the output dir of everything, then run the make again.

also, a tab at the beggining of a rule is required, if it's not there the rule will be ignored.

Makefile Target Rules

The general syntax of a Makefile Target Rule is

target [target...] : [dependent ....]
[ command ...]

Items in brackets are optional, ellipsis means one or more. Note the tab to preface each command is required.

The semantics is pretty simple. When you say "make target" make finds the target rule that applies and, if any of the dependents are newer than the target, make executes the com- mands one at a time (after macro substitution). If any dependents have to be made, that happens first (so you have a recursion).

you should also add a clean target:

A make will terminate if any command returns a failure sta- tus. That's why you see rules like:

-rm *.o *~ core paper

Make ignores the returned status on command lines that begin with a dash. eg. who cares if there is no core file?

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