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Question regarding the MCP3**1 from recommendations
I presume there is a reason that MCP is showing the performance of the analog front end at frequencies that exceed the recommended limits but wonder why 16MHz was set as the AMCLK limit. Is perhaps the ADC not able to sample correctly at these frequencies? Or is it good design practice to leave several MHz of 'headroom' between the maximum frequency where performance degrades and the maximum recommended AMCLK frequency?
I apologize in advance if this is too simplistic a question. In the meantime, I'll happily use this great chip at 15MHz MCLK = AMCLK. Thank you!