Hardware

Hi-Five Unleashed: The first Linux-capable RISC-V single board computer is here

SiFive has opened orders for the Hi-Five Unleashed, a single-board computer using the royalty-free RISC-V ISA. Here's what you need to know.

For roughly a decade, x86-64 has held hegemony over the desktop and server market. In the mobile space, ARM is the popular platform—for which a glut of cheap ARM processors have led to the rise of mass-produced single-board computers (SBCs) like the Raspberry Pi and competitors. However, proprietary "binary blob" drivers make using these devices somewhat more cumbersome, particularly for developers attempting to learn how devices work or ensuring complete device control.

New challengers using open technologies without patent encumbrances are emerging to compete in these spaces. On the performance computing side, IBM has opened the POWER ISA and licenses that design to any manufacturer that wishes to make hardware utilizing POWER processors. For low-power and embedded purposes RISC-V, an ISA developed principally by researchers at UC Berkeley with significant outside contributions, is gaining popularity.

SEE: Hardware spotlight: The Raspberry Pi (Tech Pro Research)

While early RISC-V devices have been intended for embedded applications and IoT devices, SiFive has released the first RISC-V SoC (Freedom U540) and SBC (Hi-Five Unleashed) which are powerful enough to run Linux distributions.

The Freedom U540 ia 64-bit RISC-V CPU built on a 28nm process, with the following specs:

    • 4+1 Multi-Core Coherent Configuration, up to 1.5 GHz:
    • 4x U54 RV64GC Application Cores with Sv39 Virtual Memory Support
    • 1x E51 RV64IMAC Management Core
    • Coherent 2MB L2 Cache
    • 64-bit DDR4 with ECC
    • 1x Gigabit Ethernet

        The Hi-Five Unleashed uses one Freedom U540 paired with 8GB DDR4 ECC RAM, as well as 32MB Quad SPI Flash, a microSD card slot for external storage, a Gigabit Ethernet port, and an FMC connector for future expansion cards. It can be ordered from Crowd Supply for $999, and is expected to ship on June 30th. Alternatively, you can order an early access board for $1250, which will ship on March 31st.

        Being a first-generation SBC intended for developers more than the general public, the price is much steeper than consumer-focused SBCs like the Raspberry Pi. The primary reason for this is platform maturity. ARM processors are commodity chips—the processor used in the Raspberry Pi 3 is roughly equivalent to a Qualcomm Snapdragon 410 used in budget phones. The Hi-Five Unleashed is not in function or form a "desktop replacement" SBC, as it lacks the necessary I/O ports for such tasks and has neither a video output nor USB support.

        This is purposefully developer-focused. Support for RISC-V is still early, it requires more developer care before it can be considered mature enough for consumer use. Architecture support for RISC-V was added to Linux kernel 4.15 (released in January), with additional driver code planned for 4.16. For the developer toolchain, support was added in binutils as of version 2.28 (July 2017) and gcc version 7.1 (May 2017), whereas support in glibc is still being upstreamed for the 2.27 release, support in qemu is being upstreamed for the 2.12 release, and support in gdb has not been upstreamed as of yet.

        Why RISC-V?

        RISC-V is an open source ISA that is not subject to patents, and is available under the BSD license. This license allows organizations that wish to implement or extend RISC-V in commercial products to not disclose their changes to the community at large. This makes it particularly appealing for commercial use in embedded devices, as licensing fees for ARM or MIPS designs—both of which are fundamentally RISC in principle—do not need to be paid.

        Accordingly, RISC-V is not restricted to a single supplier, it can be used freely by any vendor.

        Who else is using RISC-V?

        For embedded computing cases, NVIDIA is planning to use RISC-V processors as the next-generation replacement of the Falcon micro-controller. Similarly, Western Digital has plans to use RISC-V in future products, including in drive controllers. The company claims that once the transition has been finished, they will be shipping "two billion RISC-V cores annually."

        SEE: These are the new technologies Americans fear most (ZDNet)

        For general-purpose computing, the non-profit LowRISC project aims to ship a RISC-V SoC for use in open hardware. LowRISC is founded by Robert Mullins—a co-founder of the Raspberry Pi Foundation—and supported by the University of Cambridge.

        Also see

        hifive.jpg
        Image: SiFive

        About James Sanders

        James Sanders is a Java programmer specializing in software as a service and thin client design, and virtualizing legacy programs for modern hardware.

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