The next AI data center crunch may not be at the power meter. It may be inside the network.
As GPU clusters grow, the fabric connecting those chips is becoming a separate constraint on AI infrastructure. Congestion, switch capacity, NICs, DPUs, and vendor lock-in can affect how efficiently expensive accelerators are used, making network design a procurement issue alongside power, cooling, and GPU availability.
AI training clusters are straining the network fabric
The shift is already visible in the AI back-end network market. Dell’Oro Group reported on June 2, 2026, that Ethernet switch sales in those networks more than doubled in the first quarter of 2026 and accounted for about two-thirds of data center switch sales in AI clusters.
InfiniBand remains important for large training and high-performance computing environments. Ethernet is gaining ground as buyers look for standards-based systems, broader vendor options, and easier integration with existing operations. As AI infrastructure costs rise, capacity planning increasingly depends on compute, networking, and utilization.
Switch vendors are racing to support larger AI clusters. Broadcom said on June 3, 2025, that its Tomahawk 6 switch chip delivers 102.4 Tbps of switching capacity and is designed to support AI clusters exceeding one million accelerators. The company also cited planned deployments above 100,000 XPUs, but those are vendor claims, not independent benchmarks.
NVIDIA’s rise in networking is another sign that the bottleneck has moved beyond GPUs. IDC data reported by Business Insider showed NVIDIA became the top data center Ethernet switch vendor by revenue in the first quarter of 2026, helped by demand for its Spectrum-X platform.
As major AI developers explore custom AI chips, infrastructure teams still have to account for the fabric that connects those chips once they move from roadmap to deployment.
AI training traffic behaves differently from ordinary enterprise data center traffic. Large model training depends on GPUs exchanging data quickly through all-reduce and all-to-all operations. When congestion builds, GPUs can wait on the network instead of doing useful work.
Fabric choices now shape AI infrastructure costs
High-performance computing researchers found that congestion has become a major limitation for systems supporting scalable AI training and simulation workloads, especially as systems grow and traffic becomes more bursty. Smaller inference and AI at the edge deployments may face different constraints: latency, hardware availability, power density, and cost.
Speed tier decisions should reflect planned cluster growth. Dell’Oro’s report said 800 Gbps switches made up the vast majority of AI back-end Ethernet switch shipments and revenue in the first quarter of 2026, while 1.6 Tbps switches had begun sampling and were expected to ramp later in 2026.
Standards work is also moving quickly. The Ultra Ethernet Consortium released Specification 1.0 on June 11, 2025, describing it as an Ethernet-based communication stack for AI and high-performance computing workloads.
The consortium says the specification is intended to support multi-vendor integration across NICs, switches, optics, and cables. Even so, open Ethernet does not automatically make every AI networking stack interchangeable.
Before choosing a fabric, teams should ask whether the design can handle expected all-reduce and all-to-all traffic, which components are tied to one vendor, and whether the supplier has documented deployments at the planned cluster size and topology.
Power constraints show up in utility planning cycles and electricity costs. Networking constraints show up inside the cluster, through longer training runs, lower GPU utilization, and harder troubleshooting. Once GPU counts, power density, and vendor commitments are locked, weak network architecture becomes harder to fix.
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