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3 questions i could do with answering pleeze.
1. why does a CPU need an MAR as well as a PC?
2. why is it necessary for the ROM to be decoded at the top of the address space?
3. what does 'interrupt latency' really mean? and why is it important in a real time system??
thanx
by csmith
From the top.
#1 The CPU is the heart of the PC, so the question is unclear.
#2 The starting address for the POST routine in ROM BIOS was standardized by IBM, in the original PC, at the top of the FFFFF block because, at that time, they thought that nobody would ever need one Meg of memory. Given the available software of the time, this was not so unreasonable as it seems today.
#3 Interrupt Latency is the amount of time it takes from the time the I/O device generates an Interrupt to requestservice from the CPU , to the time the service routine is complete. (All data transfered, and CPU state restored.)
In a real time system, Interrupt Latency is the most critical aspect of the system.
If the Interrupts are not serviced rapidly enough, data is lost, and the overflows from the que of pending Interrupts can also reek havoc.
With the CPU speeds of today, this is not the problem it was when the CPU speeds were under 20 MHz.
This problem does still occur today (rare)on 2 GHz CPUs because of "Bloatware" problems and chained Interrupts (Interrupt Sharing) on "Gaming PCs).
Regards, Chris
by neilmay2
by neilmay2
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