FPGA-Based Bit Error Rate Performance Measuring of Wireless Systems

The Bit Error Ratio (also BER) is the number of bit errors divided by the total number of transferred bits during a studied time interval. The proposed BER Tester (BERT) integrates fundamental baseband signal processing modules of a typical wireless communication system along with a realistic fading channel simulator and an accurate Gaussian noise generator onto a single FPGA to provide an accelerated and repeatable test environment. Using a developed graphical user interface, the error rate performance of single and multiple-antenna systems over a wide range of parameters can be rapidly evaluated.

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International Journal of Innovative Research in Science, Engineering and Technology (IJIRSET)