VHDL Implementation of Non Restoring Division Algorithm Using High Speed Adder/subtractor

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Provided by: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE)
Topic: Hardware
Format: PDF
Binary division is basically a procedure to determine how many times the divisor D divides the dividend B thus resulting in the quotient Q. At each step in the process the divisor D either divides B into a group of bits or it does not. The divisor divides a group of bits when the divisor has a value less than or equal to the value of those bits. Therefore, the quotient is either 1 or 0. The division algorithm performs either an addition or subtraction based on the signs of the divisor and the partial remainder.
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